Analysis and Design of a Specialized Pipeline for Numerical Algorithms Implementation

Abstract

The numerical algorithms often bring a lot of elementary calculations which involve the fixed-point multiply, add and subtract operations. Many of these numerical and signal processing algorithms require repetitive use of multiply and accumulate operation. The contribution of the paper is to present the analysis and design of an FPGA-based specialized pipeline, in order to develop flexible (co)processors for applications in the field of numerical analysis and digital signal processing. Essentially, the paper focuses on some details of the analysis and design of the proposed pipeline structure. In particular, provided analysis considers the bus traffic utilization in the system. The obtained results are plotted for some specific parameters. The simulation results are also drawn. For this reason, the Altera Quartus software was used.