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Impactul conexiunilor verticale asupra ariei in integrarea 3D

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dc.contributor.author PLETEA, Ionica-Marcela
dc.contributor.author ŞONTEA, Victor
dc.contributor.author COJOCARIU, Victor
dc.date.accessioned 2019-06-28T14:07:28Z
dc.date.available 2019-06-28T14:07:28Z
dc.date.issued 2018
dc.identifier.citation PLETEA, Ionica-Marcela, ŞONTEA, Victor, COJOCARIU, Victor. Impactul conexiunilor verticale asupra ariei in integrarea 3D. In: Telecomunicaţii, Electronică şi Informatică: proc. of the 6th intern. conf., May 24-27, 2018. Chişinău, 2018, pp. 375-377. ISBN 978-9975-45-540-4. en_US
dc.identifier.isbn 978-9975-45-540-4
dc.identifier.uri http://repository.utm.md/handle/5014/2815
dc.description.abstract 3D monolithic integration allows more then an alternative for increasing density integration. This offers a new dimension of flexibility in designing integrated circuits, more exactly the ability to devide the project into partitions that can be independetly processed and operated. In the current 2D integration technology, the logical part, memories and the analog functions are processed together and have the same limitations and cost. In a 3D integration each layer can be processed in a optimized flow. In this paper we have integrated a 3D design which contains logical part and memories. We overlap memories on logical part and we present the avantages of 3D integration versus 2D in terms of area. en_US
dc.language.iso ro en_US
dc.publisher Tehnica UTM en_US
dc.rights Attribution-NonCommercial-NoDerivs 3.0 United States *
dc.rights.uri http://creativecommons.org/licenses/by-nc-nd/3.0/us/ *
dc.subject partitioning en_US
dc.subject 3D integration en_US
dc.subject area optimization en_US
dc.subject flow 2D en_US
dc.subject partiționare en_US
dc.subject integrare 3D en_US
dc.subject optimizare a zonei en_US
dc.subject flux 2D en_US
dc.title Impactul conexiunilor verticale asupra ariei in integrarea 3D en_US
dc.type Article en_US


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