Real-time control systems synthesis

SUDACEVSCHI, Viorica; ABABII, Victor; MAYKIV, Ihor; SACHENKO, Anatoliy; KOCHAN, Volodymyr; ROSHCHUPKIN, Oleksiy

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dc.contributor.author	SUDACEVSCHI, Viorica
dc.contributor.author	ABABII, Victor
dc.contributor.author	MAYKIV, Ihor
dc.contributor.author	SACHENKO, Anatoliy
dc.contributor.author	KOCHAN, Volodymyr
dc.contributor.author	ROSHCHUPKIN, Oleksiy
dc.date.accessioned	2019-10-23T07:49:38Z
dc.date.available	2019-10-23T07:49:38Z
dc.date.issued	2014
dc.identifier.citation	SUDACEVSCHI, Viorica, ABABII, Victor, MAYKIV, Ihor, SACHENKO, Anatoliy, KOCHAN, Volodymyr, ROSHCHUPKIN, Oleksiy. Real-time control systems synthesis. In: Microelectronics and Computer Science: proc. of the 8th intern. conf., October 22-25, 2014. Chişinău, 2014, pp. 357-361. ISBN 978-9975-45-329-5.	en_US
dc.identifier.isbn	978-9975-45-329-5
dc.identifier.uri	http://repository.utm.md/handle/5014/5052
dc.description.abstract	This paper presents a synthesis method of real-time control systems based on direct mapping of Petri net model into FPGA circuit. Synchronous timed Petri nets have been developed to specify and model the control system. Switching to hardware description of the system is achieved through Hard Timed Petri nets (HTPN). Direct correspondence between the elements of the original specification and circuit components ensures that the behavioral properties and time constraints, under which activate the control system, will be respected.	en_US
dc.language.iso	en	en_US
dc.publisher	Tehnica UTM	en_US
dc.rights	Attribution-NonCommercial-NoDerivs 3.0 United States	*
dc.rights.uri	http://creativecommons.org/licenses/by-nc-nd/3.0/us/	*
dc.subject	Timed Petri nets	en_US
dc.subject	Timed Hard Petri nets	en_US
dc.subject	real-time control system	en_US
dc.subject	FPGA	en_US
dc.title	Real-time control systems synthesis	en_US
dc.type	Article	en_US