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Software synthesis for embedded systems using executable and translatable UML
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| dc.contributor.author | CARAULEAN, Valeriu | |
| dc.date.accessioned | 2019-10-29T12:50:50Z | |
| dc.date.available | 2019-10-29T12:50:50Z | |
| dc.date.issued | 2005 | |
| dc.identifier.citation | CARAULEAN, Valeriu. Software synthesis for embedded systems using executable and translatable UML. In: Microelectronics and Computer Science: proc. of the 4th intern. conf., September 15-17, 2005. Chişinău, 2005, vol. 2, pp. 169-172. ISBN 9975-66-038-X. | en_US |
| dc.identifier.isbn | 9975-66-038-X | |
| dc.identifier.uri | http://repository.utm.md/handle/5014/5579 | |
| dc.description.abstract | In this paper are described Executable and Translatable UML and how it can be used in developing of Embedded Systems. Also, is evidentiated all benefits offered by automatic translation of UML models in source-code and verification of models. | en_US |
| dc.language.iso | en | en_US |
| dc.publisher | Technical University of Moldova | en_US |
| dc.rights | Attribution-NonCommercial-NoDerivs 3.0 United States | * |
| dc.rights.uri | http://creativecommons.org/licenses/by-nc-nd/3.0/us/ | * |
| dc.subject | UML | en_US |
| dc.subject | unified modeling language | en_US |
| dc.subject | softwares | en_US |
| dc.subject | application models | en_US |
| dc.title | Software synthesis for embedded systems using executable and translatable UML | en_US |
| dc.type | Article | en_US |
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