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Digital Systems Design Based on Hard Petri Nets Models

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dc.contributor.author SUDACEVSCHI, Viorica
dc.contributor.author ABABII, Victor
dc.date.accessioned 2019-11-09T14:02:54Z
dc.date.available 2019-11-09T14:02:54Z
dc.date.issued 2011
dc.identifier.citation SUDACEVSCHI, Viorica, ABABII, Victor. Digital Systems Design Based on Hard Petri Nets Models. In: Microelectronics and Computer Science: proc. of the 7th intern. Conf., September 22-24, 2011. Chişinău, 2011, vol. 1, pp. 307-311. ISBN 978-9975-45-174-1. en_US
dc.identifier.isbn 978-9975-45-174-1
dc.identifier.uri http://repository.utm.md/handle/5014/6489
dc.description.abstract This paper describes the digital systems synthesis based on direct mapping of Petri nets model into FPGA circuit. A design flow that includes the specification of the system using Synchronous Petri Nets, verification of the behavioral properties of the model, generation of the mathematical model of Hard Petri Nets (HPN), used for automatic generation of the AHDL code is described. The direct mapping approach avoids algorithmic complexity inherent in logic synthesis based on state encoding and substantially reduces the design time and cost. The method used for modeling and implementation of the digital systems was validated using MAX+PLUS II design environment. en_US
dc.language.iso en en_US
dc.publisher Technical University of Moldova en_US
dc.rights Attribution-NonCommercial-NoDerivs 3.0 United States *
dc.rights.uri http://creativecommons.org/licenses/by-nc-nd/3.0/us/ *
dc.subject digital systems en_US
dc.subject mapping en_US
dc.subject hard Petri nets en_US
dc.title Digital Systems Design Based on Hard Petri Nets Models en_US
dc.type Article en_US


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