dc.contributor.author | IORDACHE, Mihai | |
dc.contributor.author | DELEANU, Sorin | |
dc.contributor.author | CURTEANU, Ciprian | |
dc.contributor.author | GALAN, Neculai | |
dc.contributor.author | MOSCU, Atanasie | |
dc.date.accessioned | 2019-11-20T10:38:37Z | |
dc.date.available | 2019-11-20T10:38:37Z | |
dc.date.issued | 2017 | |
dc.identifier.citation | IORDACHE, Mihai, DELEANU, Sorin, CURTEANU, Ciprian et al. SYSEG – Symbolic State Equation Generation [Resursă electronică]. In: SIELMEN 2017: Proceedings of the 11-th international conference on electromechanical and power systems, 11-13 octombrie, 2017. Chișinău, 2017, pp. 191-197. ISBN 978-1-5386-1846-2. | en_US |
dc.identifier.isbn | 978-1-5386-1846-2 | |
dc.identifier.uri | http://repository.utm.md/handle/5014/7039 | |
dc.description | Abstract & References | en_US |
dc.description.abstract | The main objective of this paper is to present an efficient method for the systematic formulation of the state equations characterizing linear and/or nonlinear, time-invariant analog circuits with elements in excess. The state equations are represented in symbolic, numeric-symbolic and/or numeric normal-form. First, we have developed an algorithm, then a software package called SYSEG (SYSEG – Symbolic State Equation Generation), capable to formulate the equations in the normal form. SYSEG allows the formulation of state equations in a compact form, through successive cancellations and simplifications of the expressions, without the necessity to calculate any inverse matrices. Degeneracies of the first kind are unitarily treated, in order to allow a symbolic representation of the circuit with a minimum number of state variables. The circuits subjected to SYSEG capabilities may contain linear and nonlinear resistors, inductors, and capacitors, independent voltage and current sources, and all four types of linear controlled sources. Furthermore, we proved that SYSEG is a very useful tool for symbolic analysis and design of linear and/or nonlinear time-invariant analog circuits, providing illustrative examples. | en_US |
dc.language.iso | en | en_US |
dc.publisher | Institute of Electrical and Electronics Engineers | en_US |
dc.rights | Attribution-NonCommercial-NoDerivs 3.0 United States | * |
dc.rights.uri | http://creativecommons.org/licenses/by-nc-nd/3.0/us/ | * |
dc.subject | symbolic analysis | en_US |
dc.subject | excess elements | en_US |
dc.subject | state equations | en_US |
dc.subject | equations | en_US |
dc.subject | eigenvalues | en_US |
dc.subject | transfer functions | en_US |
dc.subject | poles | en_US |
dc.subject | zeros | en_US |
dc.title | SYSEG – Symbolic State Equation Generation | en_US |
dc.type | Article | en_US |
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