IRTUM – Institutional Repository of the Technical University of Moldova
Failures analysis of microcircuits
JavaScript is disabled for your browser. Some features of this site may not work without it.
| dc.contributor.author | BĂJENESCU, Titu-Marius | |
| dc.date.accessioned | 2020-10-15T10:49:39Z | |
| dc.date.available | 2020-10-15T10:49:39Z | |
| dc.date.issued | 2019 | |
| dc.identifier.citation | BĂJENESCU, Titu-Marius. Failures analysis of microcircuits. In: EEA - Electrotehnica, Electronica, Automatica. 2019, nr. 2(67), pp. 84-97. | en_US |
| dc.identifier.uri | http://repository.utm.md/handle/5014/10723 | |
| dc.description.abstract | For failure analysis of integrated circuits it is necessary to open and delayer a chip layer by layer in order to find a hidden defect or defects. It is necessary to determine the cause of failure to prevent future occurrence, and/or to improve the performance of the device. Increased circuit densities, smaller feature sizes and ever increasing multilayer technologies have created many challenges for failure analysis engineers. | en_US |
| dc.language.iso | en | en_US |
| dc.publisher | Editura ELECTRA | en_US |
| dc.rights | Attribution-NonCommercial-NoDerivs 3.0 United States | * |
| dc.rights.uri | http://creativecommons.org/licenses/by-nc-nd/3.0/us/ | * |
| dc.subject | failure analysis | en_US |
| dc.subject | failure mechanism | en_US |
| dc.subject | failure modes | en_US |
| dc.subject | microcircuits | en_US |
| dc.title | Failures analysis of microcircuits | en_US |
| dc.type | Article | en_US |
Files in this item
The following license files are associated with this item:
This item appears in the following Collection(s)
Except where otherwise noted, this item's license is described as Attribution-NonCommercial-NoDerivs 3.0 United States